A set of 74ALS174 registers is connected as shown in Figure 7-114. What type of data transfer is performed with each register? Determine the output of each register when the M̅R̅ is pulsed momentarily LOW and after each of the indicated clock pulses (CP#) in Table 7-10. How many clock pulses must be applied before data that are input on I5–I0 are available at Z5–Z0?

Figure 7-114

Transcribed Image Text:

CLK MR CP MR CP MR 15 14 13 12 11 10 D5 D4 D3 D2 D1 DO 74ALS174 Q5 Q4 Q3 Q2 Q1 00 W5 W4 W3 W2 W1 Wo D5 D4 D3 D2 D1 DO 74ALS174 Q5 Q4 Q3 Q2 Q1 Q0 X5 X4 X3 X2 X1 XO CP CMR CP MR D5 D4 D3 D2 D1 DO 74ALS174 8 Q5 Q4 Q3 Q2 Q1 Qo Y5 Y4 Y3 Y2 Y1 YO D5 D4 D3 D2 D1 DO 74ALS174 Q5 Q4 Q3 Q2 Q1 Q0 Z5 Z4 Z3 Z2 Z1 ZO