Add another flip-flop, E, to the counter of Figure 7-1. The clock signal is an 8-MHz square
Question:
Add another flip-flop, E, to the counter of Figure 7-1. The clock signal is an 8-MHz square wave.
(a) What will be the frequency at the E output? What will be the duty cycle of this signal?
(b) Repeat (a) if the clock signal has a 20% duty cycle.
(c) What will be the frequency at the C output?
(d) What is the MOD number of this counter?
Figure 7-1
Transcribed Image Text:
CLOCK A B с D 1 GAFF CLK C CLKO K B D CLKO 3 K "All J and K inputs assumed to be 1. 9 10 K А J FIGURE 7-1 Four-bit asynchronous (ripple) counter. CLKO K 11 12 13 14 15 16 17 18 W DCBA D) [00000001001000110100 0101 0110 01111000 1001 1010 1011 1100 1101 000000100101 Recycle to 0000
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Related Book For
Digital Systems Principles And Application
ISBN: 9780134220130
12th Edition
Authors: Ronald Tocci, Neal Widmer, Gregory Moss
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