Consider a counter circuit that contains six FFs wired in the arrangement of Figure 5-48 (i.e., Q₅, Q₄, Q₃, Q₂, Q₁, Q₀).

(a) Determine the counter’s MOD number.

(b) Determine the frequency at the output of the last FF (Q₅) when the input clock frequency is 1 MHz.

(c) What is the range of counting states for this counter?

(d) Assume a starting state (count) of 000000. What will be the counter’s state after 129 pulses?

Figure 5-48

Transcribed Image Text:

1 J O CLK K *All PRE and CLR are HIGH Q₁ Clock pulses 0 Qo 0 0 Q₂ 0 Count Q₂Q100/ TCLK -To₁- 1 1 2 Toe 3 4 TO₂ J CLK K (a) Q₁ Q₁ 1 I J O CLK K 18° n Input clock pulses 5 6 7 8 9 10 wwwwww..... 11 I I 1 000 001010011 100 101 110 111 000 001010100 (b)