Design a recycling, MOD-16, down counter. The counter should have the following controls (from lowest to highest priority): an active- LOW count enable (en), an active-HIGH synchronous clear (clr), and active-LOW synchronous load (ld). Decode the terminal count when enabled by en. Simulate (functional) the counter. Be sure to verify the decoder operation.

(a) Use LPM_COUNTER. Use any necessary logic gates.

(b) Use an HDL.