Which lines of Figure 7-94 ensure that the ring counter self-starts? Figure 7-94 1 2 3 4

Which lines of Figure 7-94 ensure that the ring counter self-starts?

Figure 7-94

Transcribed Image Text:

1 2 3 4 DHZBGE62992 10 5 6 ARCHITECTURE vhdl OF fig7_94 IS 7 SIGNAL ser_in :BIT; 8 BEGIN 9 PROCESS (clk) 11 12 13 14 15 16 17 ENTITY fig7 94 IS PORT ( clk q 18 19. 20 END fig7_94; IN BIT; :OUT BIT VECTOR (3 DOWNTO 0)); VARIABLE ff :BIT VECTOR (3 DOWNTO 0); BEGIN IF (ff (3 DOWNTO 1) - "000") THEN ser_in <- ¹1¹; ELSE ser_in <- ¹0¹; END IF; IF (clk' EVENT AND clk ¹1¹) THEN ff (3 DOWNTO 0) :-(ser_in & ff (3 DOWNTO 1)); END IF; q <- ff; END PROCESS; END vhdl; self-start shift right