Assume that registers R1 and R2 in Figure 6-6 hold two unsigned numbers. When select input X is equal to 1, the adder–subtractor circuit performs the arithmetic operation “R1 + 2s complement of R₂.” This sum and the output carry C_n are transferred into R1 and C when K₁ = 1 and a positive edge occurs on the clock.

(a) Show that if C = 1, then the value transferred to R1 is equal to R1 - R2, but if C = 0, the value transferred to R1 is the 2s complement of R2 - R1.

(b) Indicate how the value in the C bit can be used to detect a borrow after the subtraction of two unsigned numbers.

(c) How does the behavior of the C bit change if R1 and R2 hold signed 2s complement numbers?