List the control logic state table entries for the multiple- cycle computer (see Tables 8-12, 8-13 and 8-15) that implement the following register transfer statements. Assume that in all cases the present state is EX0. If an opcode is needed, use a symbolic name based on the problem part— e.g., for part (a), opcode_a.

Table 8-12

Table 8-12

Table 8-15

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(a) R3-R7 - R2, EX1. Assume DR = 3, SA = 7, SB = 2. (b) R8sr R8, INF. Assume DR = 5, SB = 5. (c) if (Z = 0) then (PC PC + se AD, INF) else (PC PC +1, INF). (d) R6-R6, C-0,INF. Assume DR = SA = 6.