The serial adder of Figure 6-24 uses two 4-bit registers. Register A holds the binary number 0111 and register B holds 0101. The carry lip-lop is initially reset to 0. List the binary values in register A and the carry lip-lop after each of four shifts.

Figure 6-24

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Shift Clock Serial input Reset Reset C -Clear SI -Clear SI Register A SRG 4 Register B SRG 4 SO SO Reset FA X Y Z D S Full Adder (Figure 5-4) Carry R