2. Convert presented conditional signal assignment statement into selected signal assignment statement: (2 points) input in...

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2. Convert presented conditional signal assignment statement into selected signal assignment statement: (2 points) input in std_logic_vector (4 downto 0); X out std_logic; signal A, B, C, D, E : std_logic; begin X <= A when B when C when D when E; (input (4) = '1') else (input (3) = '1') else (input (2) = '1') else (input (1) = '1') else 2. Convert presented conditional signal assignment statement into selected signal assignment statement: (2 points) input in std_logic_vector (4 downto 0); X out std_logic; signal A, B, C, D, E : std_logic; begin X <= A when B when C when D when E; (input (4) = '1') else (input (3) = '1') else (input (2) = '1') else (input (1) = '1') else

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