(50 pts) 1.Propose a logic circuit design to measure the time constant of an RC network....

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(50 pts) 1.Propose a logic circuit design to measure the time constant of an RC network. See the figure below. Diigital Circuit www R R a. Explain the design principle detailed enough (Not too much or too few). Remember no explanation no credit! b. Discuss about the constraints of your proposed design. e.g: "Which values of time constant cannot be detected?" c. Give your design block by block. Plot the digital circuit in each block. Design the circuits and plot them. d. Write the FPGA codes for each block, each line in your code MUST HAVE a short explanation. REMEMBER the FPGA codes must result in the designed digital circuits in section c. e. Give the RTL view of your circuit. (50 pts) 1.Propose a logic circuit design to measure the time constant of an RC network. See the figure below. Diigital Circuit www R R a. Explain the design principle detailed enough (Not too much or too few). Remember no explanation no credit! b. Discuss about the constraints of your proposed design. e.g: "Which values of time constant cannot be detected?" c. Give your design block by block. Plot the digital circuit in each block. Design the circuits and plot them. d. Write the FPGA codes for each block, each line in your code MUST HAVE a short explanation. REMEMBER the FPGA codes must result in the designed digital circuits in section c. e. Give the RTL view of your circuit.