For a system, RAM = 64KB, Block size = 4 bytes, Cache size = 128 bytes,...
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For a system, RAM = 64KB, Block size = 4 bytes, Cache size = 128 bytes, 2-way Set Associative cache. CPU requires to access following memory locations while running a program "Test Cache". 3, 5, 10, 65, 66, 129, 130, 69, 7, 133, 72, 74, 75, 11, 137, 1024 (for convenience, addresses are given in decimal). Calculate the Hit ratio assuming the cache is empty at the beginning. Also count the number of blocks replaced in cache memory if LRU (least Recently Used) is used as replacement algorithm. Please construct a table as follows and caleulate/provide info for each address. of Set no Hit/ Miss Memory address Block Consequence Comments, if any State of cache RAM Checked (to be assigned in case of Miss) Block-0 is transferred into Line- Line-1 is chosen randomly 1 of Set-0 Block-1 is transferred into Line- Line-1 is chosen randomly 1 of Set-1 Block-2 is transferred into Line- Line-l is chosen randomly I of Set-2 3 M Set-0 Line-1 В-32 5 1 M Line-2 B 16 В-256 Set-1 Line-1 B-1 10 2. M Line-2 Line-1 Line-2 Line-1 В-33 Set-2 В-2 65 16 M Block-16 is transferred into Line-2 is found free B 18 В-34 Line-2 of Set-0 Set-3 66 16 H CPU reads from Line-2 of Set-0 Line-2 Block-32 is transferred into B-0 of Line-1 is replaced since B-16 of Line-2 has been accessed recently and Least Recently used (LRU) algorithm is 129 32 M Line-l of Set-0 Set-15 Line-1 used Line-2 130 32 H CPU reads from Line-1 of Set-0 69 17 1 M Block-17 is transferred into Line-2 is found free Line-2 of Set-1 CPU reads from Line-l of Set-1 Block-33 is transferred into B-17 of Line-2 is replaced since B-1 of 7 1 1 H 133 33 1 M Line-1 has been accessed recently and Least Recently used (LRU) algorithm is used Line-2 of Set-1 Block-18 is transferred into Line-2 is found FREE Line-2 of Set-2 CPU reads from Line-2 of Set-2 CPU reads from Line-2 of Set-2 72 18 2 M 74 18 2 H. 75 18 2. H 11 2 H CPU reads from Line-l of Set-2 Block-34 is transferred into B-18 of Line-2 is replaced since B-2 of Line-2 of Set-2 137 34 2 M Line-1 has been accessed recently and Least Recently used (LRU) algorithm is used 1024 256 M Block-256 is transferred into B-16 of Line-2 is replaced since B-32 of Line-l has been accessed recently and Least Recently used (LRU) algorithm is used Line-2 of Set-0 For a system, RAM = 64KB, Block size = 4 bytes, Cache size = 128 bytes, 2-way Set Associative cache. CPU requires to access following memory locations while running a program "Test Cache". 3, 5, 10, 65, 66, 129, 130, 69, 7, 133, 72, 74, 75, 11, 137, 1024 (for convenience, addresses are given in decimal). Calculate the Hit ratio assuming the cache is empty at the beginning. Also count the number of blocks replaced in cache memory if LRU (least Recently Used) is used as replacement algorithm. Please construct a table as follows and caleulate/provide info for each address. of Set no Hit/ Miss Memory address Block Consequence Comments, if any State of cache RAM Checked (to be assigned in case of Miss) Block-0 is transferred into Line- Line-1 is chosen randomly 1 of Set-0 Block-1 is transferred into Line- Line-1 is chosen randomly 1 of Set-1 Block-2 is transferred into Line- Line-l is chosen randomly I of Set-2 3 M Set-0 Line-1 В-32 5 1 M Line-2 B 16 В-256 Set-1 Line-1 B-1 10 2. M Line-2 Line-1 Line-2 Line-1 В-33 Set-2 В-2 65 16 M Block-16 is transferred into Line-2 is found free B 18 В-34 Line-2 of Set-0 Set-3 66 16 H CPU reads from Line-2 of Set-0 Line-2 Block-32 is transferred into B-0 of Line-1 is replaced since B-16 of Line-2 has been accessed recently and Least Recently used (LRU) algorithm is 129 32 M Line-l of Set-0 Set-15 Line-1 used Line-2 130 32 H CPU reads from Line-1 of Set-0 69 17 1 M Block-17 is transferred into Line-2 is found free Line-2 of Set-1 CPU reads from Line-l of Set-1 Block-33 is transferred into B-17 of Line-2 is replaced since B-1 of 7 1 1 H 133 33 1 M Line-1 has been accessed recently and Least Recently used (LRU) algorithm is used Line-2 of Set-1 Block-18 is transferred into Line-2 is found FREE Line-2 of Set-2 CPU reads from Line-2 of Set-2 CPU reads from Line-2 of Set-2 72 18 2 M 74 18 2 H. 75 18 2. H 11 2 H CPU reads from Line-l of Set-2 Block-34 is transferred into B-18 of Line-2 is replaced since B-2 of Line-2 of Set-2 137 34 2 M Line-1 has been accessed recently and Least Recently used (LRU) algorithm is used 1024 256 M Block-256 is transferred into B-16 of Line-2 is replaced since B-32 of Line-l has been accessed recently and Least Recently used (LRU) algorithm is used Line-2 of Set-0
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Elementary Statistics A step by step approach
ISBN: 978-0073386102
8th edition
Authors: Allan Bluman
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