Large-scale integrated (LSI) circuit chips are made in one department of an electronics firm. These chips are incorporated into analogue devices that are then encased in epoxy. The yield is not particularly good for LSI manufacture, so the AQL specified by that department is 2%, while the LTPD acceptable by the assembly department is 8%.

1. Develop a sampling plan. 

2. Explain what the sampling plan means; that is, how would you tell someone to do the test?

3. Draw the Operating Characteristic (OC) Curve and fully labelled it.

Answer rating: 100% (QA)

A QL 2 LT PD 8 A sampling plan for large scale integrated LS I cir... View the full answer