A digital multiplexer is a combinational circuit that selects binary information from one of many input...
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A digital multiplexer is a combinational circuit that selects binary information from one of many input lines and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines (also inputs). Below is a figure showing the logic diagram, function table, and block diagram for a 4-to-1 multiplexer. 4₂ S₁ (a) Logic diagram Fig 1. A 4-to-1 multiplexer S₁ SY 0 0 0 1 1 1 lo 4₁ 0 h 14 (b) Function table A common way of using multiplexers is by applying them to Boolean functions. These functions typically define a certain set of outputs a multiplexer will produce. If we have a Boolean function of n + 1 variables, we take n of these variables and connect them to the selection lines of a multiplexer. The remaining single variable of the function is used for the inputs of the multiplexer. If A is this single variable, then we would have 4 inputs to the multiplexer, A, A', 0, and 1 respectively. We can use these inputs along with selection inputs to implement any Boolean function with a multiplexer. We can then generate any function of n + 1 variables with a 2-to-1 multiplexer. Below is a figure showing the truth table, multiplexer block diagram, and implementation table for Boolean function F(a, b, c) = (1, 2, 4, 5) X y 0 0 0 0 0 0 N F 0 0 1 1 1 0 1 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 F=z F=z' F=0 F-1 y 0 So S₁ 0 1 2 3 4 X 1 MUX (a) Truth table (b) Multiplexer implementation Fig 2. Multiplexer implementation of a Boolean function F As you can see from the figure above (block diagram), we have 3 inputs where n + 1 is 2 + 1. Therefore, we take n, or 2 of these to be our selection inputs, x and y. The main inputs to the multiplexer would then be z, z', 0, and 1 respectively. The next thing to consider is the truth table. Essentially, we are just labeling from 0 to n - 1 as usual (these are, again, the possible combinations of inputs). However, we must group all the rows in groups of 2. This is necessary for deciphering the placement of our inputs for the multiplexer. As you can see with the first grouping, when F is the set {0, 1}, we get z. When F is the set (1, 0), we get z'. When F is either (0, 0) or (1, 1), we get 0 or 1 respectively. These will relate to our four inputs, I0... 13, the regular inputs to our multiplexer. Procedure & Results Part 1: (35 points) Draw an 8-1 multiplexer in Logisim. Use logic gates. 8 input 1 output. Part 2: Apply multiplexer to Boolean function (65 points) Consider the binary numbers from 0 to 15. The function F(a, b, c, d) is "1" only when the binary number represented by {a, b, c, d) is divisible by 3. Design and implement this function by following these steps: 1. Draw the truth table. (10 points) 2. Using the truth table, implement the following actions to design a logic circuit for the function using only the 74151 and 7404 chips. The challenge is to group each row in 2s and derive the outputs for {D0... D7} and then figure out where the 1s and Os will go. a. Create a logical expression for the multiplexer inputs (15 points) b. Design the circuit in Logisim (10 points) c. Implement the circuit on the breadboard (30 points) A digital multiplexer is a combinational circuit that selects binary information from one of many input lines and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines (also inputs). Below is a figure showing the logic diagram, function table, and block diagram for a 4-to-1 multiplexer. 4₂ S₁ (a) Logic diagram Fig 1. A 4-to-1 multiplexer S₁ SY 0 0 0 1 1 1 lo 4₁ 0 h 14 (b) Function table A common way of using multiplexers is by applying them to Boolean functions. These functions typically define a certain set of outputs a multiplexer will produce. If we have a Boolean function of n + 1 variables, we take n of these variables and connect them to the selection lines of a multiplexer. The remaining single variable of the function is used for the inputs of the multiplexer. If A is this single variable, then we would have 4 inputs to the multiplexer, A, A', 0, and 1 respectively. We can use these inputs along with selection inputs to implement any Boolean function with a multiplexer. We can then generate any function of n + 1 variables with a 2-to-1 multiplexer. Below is a figure showing the truth table, multiplexer block diagram, and implementation table for Boolean function F(a, b, c) = (1, 2, 4, 5) X y 0 0 0 0 0 0 N F 0 0 1 1 1 0 1 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 F=z F=z' F=0 F-1 y 0 So S₁ 0 1 2 3 4 X 1 MUX (a) Truth table (b) Multiplexer implementation Fig 2. Multiplexer implementation of a Boolean function F As you can see from the figure above (block diagram), we have 3 inputs where n + 1 is 2 + 1. Therefore, we take n, or 2 of these to be our selection inputs, x and y. The main inputs to the multiplexer would then be z, z', 0, and 1 respectively. The next thing to consider is the truth table. Essentially, we are just labeling from 0 to n - 1 as usual (these are, again, the possible combinations of inputs). However, we must group all the rows in groups of 2. This is necessary for deciphering the placement of our inputs for the multiplexer. As you can see with the first grouping, when F is the set {0, 1}, we get z. When F is the set (1, 0), we get z'. When F is either (0, 0) or (1, 1), we get 0 or 1 respectively. These will relate to our four inputs, I0... 13, the regular inputs to our multiplexer. Procedure & Results Part 1: (35 points) Draw an 8-1 multiplexer in Logisim. Use logic gates. 8 input 1 output. Part 2: Apply multiplexer to Boolean function (65 points) Consider the binary numbers from 0 to 15. The function F(a, b, c, d) is "1" only when the binary number represented by {a, b, c, d) is divisible by 3. Design and implement this function by following these steps: 1. Draw the truth table. (10 points) 2. Using the truth table, implement the following actions to design a logic circuit for the function using only the 74151 and 7404 chips. The challenge is to group each row in 2s and derive the outputs for {D0... D7} and then figure out where the 1s and Os will go. a. Create a logical expression for the multiplexer inputs (15 points) b. Design the circuit in Logisim (10 points) c. Implement the circuit on the breadboard (30 points)
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Income Tax Fundamentals 2013
ISBN: 9781285586618
31st Edition
Authors: Gerald E. Whittenburg, Martha Altus Buller, Steven L Gill
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