The RISC-V data path design considered only a subset of that processor instructions. In this project, you
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Question:
The RISC-V data path design considered only a subset of that processor instructions. In this project, you are required to augment the design of the data path for the following instructions:
- Add immediate: Addi Xd, Xs, imm
- Load Sum: Lws rd, rs1, rs2; where Reg[rd]=Mem[rs1+rs2].
For example, if x5=20, x6=30 then the instruction Lw1 x4,x5,x6 will load X4 with the contents of memory location 50.
- Swap rs1, rs2 swaps contents of the two registers.
- Store Sum: SS rs1, rs2, imm; Mem[rs1]=rs2+imm
- Problem Statement
- Design Details
For each instruction from the above list:
- Define the most appropriate instruction format for the instruction.
- Define the new functional units (if any) that is needed for this instruction.
- Define the modifications ( if any) that has to be done to existing data path. If not, justify that the current data path is sufficient.
- Define any new control signals (if any) to be provided by the control unit.
- Define the settings of all control signal for that instruction.
- Draw the data path that demonstrates the implementation of that instruction.
- Complete data path: Draw the complete data path units along with the control signals for all the instructions. ( Those implemented in class and the above listed instructions)
- Performance: Discuss how the performance of the processor is affected by the new instructions.
Related Book For
Database Systems A Practical Approach to Design Implementation and Management
ISBN: 978-0132943260
6th Edition Global
Authors: Thomas Connolly, Carolyn Begg
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