(b) The operation of the ALU used in the processor designed in class is controlled using...

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(b) The operation of the ALU used in the processor designed in class is controlled using the operation bus with the signals: ANOP, AOP and AADD; see Figure 1. Show how the tri-state buffers can be replaced with an appropriate multiplexer and show the signals that will replace the ANOP, AOP and AADD signals. 8 marks ANOP Opr. Bus 0000 AADD 0001 AOP Figure 1: ALU control IR (b) The operation of the ALU used in the processor designed in class is controlled using the operation bus with the signals: ANOP, AOP and AADD; see Figure 1. Show how the tri-state buffers can be replaced with an appropriate multiplexer and show the signals that will replace the ANOP, AOP and AADD signals. 8 marks ANOP Opr. Bus 0000 AADD 0001 AOP Figure 1 ALU control IR (b) The operation of the ALU used in the processor designed in class is controlled using the operation bus with the signals: ANOP, AOP and AADD; see Figure 1. Show how the tri-state buffers can be replaced with an appropriate multiplexer and show the signals that will replace the ANOP, AOP and AADD signals. 8 marks ANOP Opr. Bus 0000 AADD 0001 AOP Figure 1: ALU control IR (b) The operation of the ALU used in the processor designed in class is controlled using the operation bus with the signals: ANOP, AOP and AADD; see Figure 1. Show how the tri-state buffers can be replaced with an appropriate multiplexer and show the signals that will replace the ANOP, AOP and AADD signals. 8 marks ANOP Opr. Bus 0000 AADD 0001 AOP Figure 1 ALU control IR

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