1. A computer has an associative cache with a block size of 16 bytes per block....
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1. A computer has an associative cache with a block size of 16 bytes per block. An integer is a 4-byte number. In this case, how does the data alignment of integers affect the performance of memory access? This question carries 4 points. 2. An associative mapping cache with 4 blocks and uses the LRU replacement algorithm. The cache is assumed to be initially empty. What is the value of the counters after the following sequence of cache hits(H)/misses (M)? M, M, M, H#O, M, H#1, H#1, H#3, M, H#2, M, M Where H#/means cache hit for block #i Block #Counter #0 #1 #2 #3 3. A computer system uses 16-bit memory addresses. It has a 1K-word cache organized in an associative cache manner and is divided into 16 blocks. Find the following: A. The number of bits in each of the Tag field is bits B. The number of bits in each of the Word field is bits This question carries 4 points. This question carries 4 points. 4. A computer system uses 16-bit memory addresses and a cache divided into 4 sets, each set contains 2 blocks, and each block contains 16 words. Supposed the cache is initially empty, for the following memory accesses sequence for the words with the following addresses (listed in the order that the contents are accessed), indicate whether it results in cache block replacement (an existing block is replaced by a new block) or not. If a block is initially empty, then bring in the new block is not a replacement. For the following, select 'yes' if there is a replacement, and 'no' otherwise. ✓ 0x0120 Ox0228 0x0320 ✓ 0x0334 0x0838 0x0878 0x0824 1. A computer has an associative cache with a block size of 16 bytes per block. An integer is a 4-byte number. In this case, how does the data alignment of integers affect the performance of memory access? This question carries 4 points. 2. An associative mapping cache with 4 blocks and uses the LRU replacement algorithm. The cache is assumed to be initially empty. What is the value of the counters after the following sequence of cache hits(H)/misses (M)? M, M, M, H#O, M, H#1, H#1, H#3, M, H#2, M, M Where H#/means cache hit for block #i Block #Counter #0 #1 #2 #3 3. A computer system uses 16-bit memory addresses. It has a 1K-word cache organized in an associative cache manner and is divided into 16 blocks. Find the following: A. The number of bits in each of the Tag field is bits B. The number of bits in each of the Word field is bits This question carries 4 points. This question carries 4 points. 4. A computer system uses 16-bit memory addresses and a cache divided into 4 sets, each set contains 2 blocks, and each block contains 16 words. Supposed the cache is initially empty, for the following memory accesses sequence for the words with the following addresses (listed in the order that the contents are accessed), indicate whether it results in cache block replacement (an existing block is replaced by a new block) or not. If a block is initially empty, then bring in the new block is not a replacement. For the following, select 'yes' if there is a replacement, and 'no' otherwise. ✓ 0x0120 Ox0228 0x0320 ✓ 0x0334 0x0838 0x0878 0x0824
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Answer rating: 100% (QA)
Answer 1 Since a cache block is 16 bytes the offset of a block or word is 4 bits Fully associative 16 kb cache so the line offset should be Cache sizeblock size ... View the full answer
Related Book For
Elementary Surveying An Introduction to Geomatics
ISBN: 978-0273751441
13th Edition
Authors: Charles D. Ghilani, Paul R. Wolf
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