In this project, we need to design an accumulator computer. The memory in this computer system...

  

Transcribed Image Text:

In this project, we need to design an accumulator computer. The memory in this computer system is 16-bit cell memory. Assume that the memory is synchronous to the CPU, and the CPU can read/write one cell in a single clock cycle. The memory can only be accessed through the memory address register (MAR) and the memory buffer register (MBR). In addition to the accumulator register (AC), the CPU has a program counter (PC) register and an instruction register (IR). The 16-bit instruction format is as follow: Opcode(4bits) M (1bit) Mode bit: M=1 → Memory address Sub Mul M = 0 ➜ Immediate constant (signed integer 2's complement) This machine should support at least the following instructions with the following opcodes: Instruction Opcode Load 1 Store 2 ADD Memory address/constant (11bits) Div Branch BRZ 3 4 5 6 7 8 Ac Go 1) Initialize the memory with the following four instructions at memory address 0-3, and data at memory address 10-12, as shown in the following table. a) Interpret each instruction into assembly instruction and add it to its corresponding instruction in the table. Also, interpret the integer's data into decimal and add them into the table. b) Simulate the four instructions at address 0 by initializing PC =0. Provide a snapshot of your resulted waveform. Verify that it works correctly and the also verify that the result stored at address 12 is correct. Attach simulation waveform and the Verilog source file. Memory Content Address 0 1 2 3 10 11 12 0x180A 0x580B 0x3005 0x280C 0x0009 OxFFFC 0x0000 Content interpretation: assembly instruction + data in decimal 2) Assume A,B,C,D,E and Y are memory cells with addresses 20,21,22,23,24, and 25, respectively. Given, Y=E+T A+B+C-5 a) Write assembly code for implementing the above arithmetic expression? In this project, we need to design an accumulator computer. The memory in this computer system is 16-bit cell memory. Assume that the memory is synchronous to the CPU, and the CPU can read/write one cell in a single clock cycle. The memory can only be accessed through the memory address register (MAR) and the memory buffer register (MBR). In addition to the accumulator register (AC), the CPU has a program counter (PC) register and an instruction register (IR). The 16-bit instruction format is as follow: Opcode(4bits) M (1bit) Mode bit: M=1 → Memory address Sub Mul M = 0 ➜ Immediate constant (signed integer 2's complement) This machine should support at least the following instructions with the following opcodes: Instruction Opcode Load 1 Store 2 ADD Memory address/constant (11bits) Div Branch BRZ 3 4 5 6 7 8 Ac Go 1) Initialize the memory with the following four instructions at memory address 0-3, and data at memory address 10-12, as shown in the following table. a) Interpret each instruction into assembly instruction and add it to its corresponding instruction in the table. Also, interpret the integer's data into decimal and add them into the table. b) Simulate the four instructions at address 0 by initializing PC =0. Provide a snapshot of your resulted waveform. Verify that it works correctly and the also verify that the result stored at address 12 is correct. Attach simulation waveform and the Verilog source file. Memory Content Address 0 1 2 3 10 11 12 0x180A 0x580B 0x3005 0x280C 0x0009 OxFFFC 0x0000 Content interpretation: assembly instruction + data in decimal 2) Assume A,B,C,D,E and Y are memory cells with addresses 20,21,22,23,24, and 25, respectively. Given, Y=E+T A+B+C-5 a) Write assembly code for implementing the above arithmetic expression?