Consider the simplified op-amp in Figure 14.11. Neglect the emitter-follower output stage. Assume bias voltages of (V^{+}=3
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Consider the simplified op-amp in Figure 14.11. Neglect the emitter-follower output stage. Assume bias voltages of \(V^{+}=3 \mathrm{~V}\) and \(V^{-}=-3 V\). Let the bias current for \(Q_{5}\) and \(Q_{6}\) be \(I_{Q}=0.1 \mathrm{~mA}\). The total power dissipated in the circuit is to be limited to \(0.65 \mathrm{~mW}\). Design the circuit such that the slew rate is \(2 \mathrm{~V} / \mu \mathrm{s}\). Determine \(I_{Q}\) for \(Q_{1}\) and \(Q_{2}\), and find the appropriate value for \(C_{1}\).
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Related Book For
Microelectronics Circuit Analysis And Design
ISBN: 9780071289474
4th Edition
Authors: Donald A. Neamen
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