Design a MOSFET circuit with the configuration shown in Figure P3.30. The transistor parameters are \(V_{T P}=-0.6 \mathrm{~V}, k_{p}^{\prime}=50 \mu \mathrm{A} / \mathrm{V}^{2}\), and \(\lambda=0\). The circuit bias is \(\pm 3 \mathrm{~V}\), the drain current is to be \(0.2 \mathrm{~mA}\), the drain-tosource voltage is to be approximately \(3 \mathrm{~V}\), and the voltage across \(R_{S}\) is to be approximately equal to \(V_{S G}\). In addition, the current through the bias resistors is to be no more than 10 percent of the drain current.

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R = 8kQ ww +3 V R = 22 ks ww Rs= 0.5 RD= 5 Figure P3.30 -3 V