Figure P10.52 is a PMOS version of the current-source circuit shown in Figure 10.17. The transistor \(M_{2}\) sources a bias current to a load circuit. Assume the circuit is biased at \(V^{+}=+5 \mathrm{~V}\) and \(V^{-}=-5 \mathrm{~V}\), and assume the transistor parameters are \(V_{T P}=-0.5 \mathrm{~V}, k_{p}^{\prime}=50 \mu \mathrm{A} / \mathrm{V}^{2},(W / L)_{1}=\) \((W / L)_{2}=15,(W / L)_{3}=3\), and \(\lambda=0\). Determine \(I_{\mathrm{REF}}, I_{O}\), and \(V_{S D 2}(\mathrm{sat})\).

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IREF V+ M3 + VGS3 M M2 + + VGS1 VGS2 ID2=10 Figure 10.17 MOSFET current source