(a) For the circuit of Problem 5.1, sketch load lines in the I_c- V_ceplane for R_L= 2 k„¦ and R_L= 10 k„¦.

(b) Calculate the maximum average sinusoidal output power that can be delivered to R_L (both values) before clipping occurs in (a) above. Sketch corresponding waveforms for I_c1, V_ce1, and P_c1.

(c) Calculate the circuit efficiency for each value of R_L in (b). (Neglect power dissipated inQ₃ and R₃.)

(d) Select R_L for maximum efficiency in this circuit and calculate the corresponding average output power with sinusoidal signals.

Problem 5.1

A circuit as shown in Fig. 5.1 has V_CC = 15V, R₁ = R₂ = 0, R₃ = 5k„¦, R_L = 2k„¦, V_CE(sat) = 0.2 V, and V_BE(on) = 0.7 V. All device areas are equal.

Figure 5.1

Transcribed Image Text:

+Vc_ Q1 V; I'e RL R3 Q2 Q3 R2 R1 -Vcc