An all-npn Darlington output stage is shown in Fig. 5.42. For all devices V BE(on) = 0.7

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An all-npn Darlington output stage is shown in Fig. 5.42. For all devices VBE(on)= 0.7 V, VCE(sat)= 0.2 V, βF= 100. The magnitude of the collector current in Q3is 2 mA.

(a) If RL = 8 Ω, calculate the maximum positive and negative limits of Vo.

(b) Calculate the power dissipated in the circuit for Vo = 0 V.

(c) Calculate the maximum average power that can be delivered to RL = 8 Ω before clipping occurs and the corresponding efficiency of the complete circuit. Also calculate the maximum instantaneous power dissipated in each output transistor. Assume that feedback is used around the circuit so that Vo is approximately sinusoidal.

Figure 5.42:

+12 V Q3 BIAS- 2 mA Q4 Q5 D3 D2 Vo D, RL Q2 Vị

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Analysis and Design of Analog Integrated Circuits

ISBN: 978-0470245996

5th edition

Authors: Paul R. Gray, ‎ Paul J. Hurst Stephen H. Lewis, ‎ Robert G. Meyer

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