Find the output resistance for the active-cascode circuit of Fig. 3.77 excluding resistor R. Assume that all the transistors operate in the active region with dc drain currents of 100 µA. Use the transistor parameters in Table 2.4. Ignore the body effect. Assume W = 10µm, L_drwn= 0.4µm, and X_d=0.10µm for all transistors. Check your answer with SPICE.

Fig. 3.77:

Table 2.4

Transcribed Image Text:

VDD Ro M2 No Мз M1 V; Value Value n-Channel p-Channel Parameter Symbol Transistor Transistor Units Substrate doping Gate oxide thickness 5 x 105 Atoms/cm NA, Np 4 x 106 Гоx 80 80 Metal-silicon work function Фия -0.6 -0.1 cm?/V-s Channel mobility Minimum drawn channel 450 150 Larwn 0.4 0.4 um length Source, drain junction depth Source, drain side diffusion Overlap capacitance per unit gate X) La 0.15 0.18 0.09 0.09 pm 0.35 0.35 fF/um width Threshold adjust implant (box dist) impurity type effective depth effective surface х, 0.16 0.16 Nsi 4 x 1016 3 x 1016 Atoms/cm concentration Nominal threshold voltage Polysilicon gate doping concentration V, Napoly 0.6 100 -0.8 1020 Atoms/cm R, ΩΟ Poly gate sheet resistance Source, drain-bulk junction Cp 0.2 0.4 fF/um? capacitances (zero bias) Source, drain-bulk junction capacitance grading 0.5 0.4 coefficient Source, drain periphery capacitance (zero bias) Source, drain periphery Срно 1.2 2.4 f/um 0.4 0.3 capacitance grading coefficient Source, drain junction built-in potential 0.7 0.7 Os Surface-state density 10" 10" Atoms/cm? Channel-length modulation parameter "XP dVps 0.02 0.04 um/V