Change the asynchronous-clear-circuit of the figure to the synchronous-clear-circuit, The modified register will have parallel load capability
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Change the asynchronous-clear-circuit of the figure to the synchronous-clear-circuit, The modified register will have parallel load capability and asynchronous clear capability, but no asynchronous clear circuit. The register is cleared synchronously when the clock pulse in the CP goes through a negative transition provided R = 1 and S = 0 in all the flip-flops.
Related Book For
Physics for Scientists and Engineers A Strategic Approach with Modern Physics
ISBN: 978-0133942651
4th edition
Authors: Randall D. Knight
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