Draw the schematic of a folded-cascode op amp similar to the op amp in Fig. 6.28 except
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Figure 6.28
Table 2.4
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VDD M4 VBIAS1 Мз M5 МАл Мзл M2 M1 CL УBIAS2 УBIAS2 M2A M1A УBIAS3 УBIAS3 M12 M11 -Vss Value Value n-Channel p-Channel Parameter Symbol Transistor Transistor Units Substrate doping Gate oxide thickness 5 x 105 4 x 1016 Atoms/cm NA, ND lox 80 80 Metal-silicon work function Фия -0.6 -0.1 450 cm?/V-s Channel mobility Minimum drawn channel length Source, drain junction depth Source, drain side diffusion 150 Larwn 0.4 0.4 um X) L4 0.15 0.18 um 0.09 0.09 um Overlap capacitance per unit gate 0.35 0.35 fF/um width Threshold adjust implant (box dist) impurity type effective depth effective surface х, 0.16 4 x 1016 0.16 Nsi 3 x 1016 Atoms/cm concentration Nominal threshold voltage Polysilicon gate doping concentration V, Napoly 0.6 100 -0.8 100 Atoms/cm Poly gate sheet resistance Source, drain-bulk junction R, Cp 0.2 0.4 fF/um? capacitances (zero bias) Source, drain-bulk junction capacitance grading coefficient 0.5 0.4 Source, drain periphery capacitance (zero bias) Source, drain periphery Суио 1.2 2.4 F/μη 0.4 0.3 capacitance grading coefficient Source, drain junction built-in potential 0.7 0.7 Os Surface-state density 10! 10" Atoms/cm? Channel-length modulation parameter ах, dV ps 0.02 0.04 um/V
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Related Book For
Analysis and Design of Analog Integrated Circuits
ISBN: 978-0470245996
5th edition
Authors: Paul R. Gray, Paul J. Hurst Stephen H. Lewis, Robert G. Meyer
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