The feedback circuit in Fig. 12.58 is a switched-capacitor circuit during one clock phase. Assume the op amp is the folded-cascode op amp in Fig. 12.31.

(a) Calculate the DM and CM output load capacitances, considering only the capacitances in the Fig. 12.58.

(b) If the op-amp bias currents are |I_D3| = |I_D4| = 100 µA and |I_D5| = I_D11 = I_D12 = 200 µA, calculate the DM output slew rate dV_od/dt.

(c) If all transistors have |V_ov| = 0.15 V and V_DD = V_SS = 2 V, what is the maximum peak differential output swing? AssumeV_BB3 and V_BB4 are chosen to give maximum swing.

Fig. 12.52:

Fig. 12.31:

Transcribed Image Text:

0.5 pF 1.5 pF 1 pF V od V,1 1 pF V 2 0.5 pF 1.5 pF Vв2 V DD M4 Vв1 Mз M5 V вВA MAA МЗА M2 OVi2 M1 V;1 Vo20 Vo1 Vввз M2A M1A M12 M11 Ven сте -Vss