It is possible to have an even greater cache hierarchy than two levels. Given the processor above with a second level, direct-mapped cache, a designer wants to add a third level cache that takes 50 cycles to access and will reduce the global miss rate to 1.3%. Would this provide better performance? In general, what are the advantages and disadvantages of adding a third level cache?

Multilevel caching is an important technique to overcome the limited amount of space that a First level cache can provide while still maintaining its speed. Consider a processor with the following parameters:

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1.0 1.5 2 GHz 2 GHz 150 ns 100 ns 3% 7% 15 cycles 12 cycles 5.0% 3.5% 20 cycles 28 cycles 2.0% 1.5% Base CPI, No Memory Stalls Processor Speed Main Memory Access Time First Level Cache Miss Rate per Instruction Second Level Cache, Direct-Mapped Speed Global Miss Rate with Second Level Cache, Direct-Mapped Second Level Cache, Eight-Way Set Associative Speed Global Miss Rate with Second Level Cache, Eight-Way Set Associative