For each of the following statements, indicate the type(s) of counter being described.

(a) Each FF is clocked at the same time.

(b) Each FF divides the frequency at its CLK input by 2.

(c) The counting sequence is 111, 110, 101, 100, 011, 010, 001, 000.

(d) The counter has 10 distinct states.

(e) The total switching delay is the sum of the individual FFs’ delays.

(f) This counter requires no decoding logic.

(g) The MOD number is always twice the number of FFs.

(h) This counter divides the input frequency by its MOD number.

(i) This counter can begin its counting sequence at any desired starting state.

(j) This counter can count in any direction.

(k) This counter can suffer from decoding glitches due to its propagation delays.

(l) This counter only counts from 0 to 9.

(m) This counter can be designed to count through arbitrary sequences by determining the logic circuit needed at each flip-flop’s synchronous control inputs.