Refer to Figure 8-65(a), where a 74LS TTL output, Q, is driving a CMOS INVERTER operating at V_DD = 10 V. The waveforms at Q and X appear as shown in Figure 8-65(b). Which of the following is a possible reason why X stays HIGH?

(a) The 10-V supply is faulty.

(b) The pull-up resistor is too large.

(c) The 74LS112 output breaks down at well below 10 V and maintains a 5.5-V level in the HIGH state. This is in the indeterminate range for the CMOS input.

(d) The CMOS input is loading down the TTL output.

Figure 8-65

Transcribed Image Text:

Q +5 V +5 V 5.5 V 0 X 10 V J 74LS112 OCLK K (a) (b) +10 V Rp 4049B CMOS X *For 4049B at Vpp = 10 V: VIL(max) = 3 V VIH (min) = 7 V