The SDRAM on the DE1 board from Terasic contains an 8 Mbyte SDRAM. This IC has 12 address (A₁₁–A₀). All 12 address bits are latched into the row address register by R̅A̅S̅. The IC has two input pins (separate from the address inputs) to specify which bank is being accessed.

(a) How many banks are in this IC?

(b) How many bytes are in each bank?

(c) How many rows must be refreshed on this SDRAM?

(d) How many bits must be latched into the column address register to select one of the memory bytes stored in the selected bank?