In a ternary number system there are three digits: 0, 1, and 2. Figure P3.3 defines a
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In a ternary number system there are three digits: 0, 1, and 2. Figure P3.3 defines a ternary half-adder. Design a circuit that implements this half-adder using binary-encoded signals, such that two bits are used for each ternary digit. Let A = a1a0, B = b1b0, and Sum = s1s0; Carry is just a binary signal. Use the following encoding: 00 = (0)3, 01 = (1)3, and 10 = (2)3. Minimize the cost of the circuit.
Transcribed Image Text:
AB Carry 00 01 02 10 11 12 20 21 22 0 0 0 0 0 1 0 1 1 Sum 0 1 2 1 2 0 2 0 1
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Related Book For
Fundamentals Of Digital Logic With Verilog Design
ISBN: 9780073380544
3rd Edition
Authors: Stephen Brown, Zvonko Vranesic
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