Design a Universal Register having 4 parallel inputs 13121110, 4 parallel outputs R3R2R1R0, a clear line...

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Design a Universal Register having 4 parallel inputs 13121110, 4 parallel outputs R3R2R1R0, a clear line CLR, 2 select lines S1S0. The select lines will decide the operation as below: Register Operation S1 0 0 1 1 Mode Control S₁ So SO 0 1 0 1 R3 R₂ R₁ Ro USR 13 12 I₁ Io CLR Parallel Load Shift Rightangula Shift Left No Change Draw the Register Circuit design with all connections. Please use D Flip Flops and 4x1 Multiplexers. Design a Universal Register having 4 parallel inputs 13121110, 4 parallel outputs R3R2R1R0, a clear line CLR, 2 select lines S1S0. The select lines will decide the operation as below: Register Operation S1 0 0 1 1 Mode Control S₁ So SO 0 1 0 1 R3 R₂ R₁ Ro USR 13 12 I₁ Io CLR Parallel Load Shift Rightangula Shift Left No Change Draw the Register Circuit design with all connections. Please use D Flip Flops and 4x1 Multiplexers.