Given the following state diagram, obtain the corresponding synchronous sequential circuit with JK flip-flops. Draw this circuit. The circuit is to be designed by treating the unused states as don’t care conditions. (Use x as an input, and z as an output).

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100 1/1 1/1 0/0 001) 1/0 0/0 010) 1/1 000 0/0 0/0 1/1 0/0 011 100 1/1 1/1 0/0 001) 1/0 0/0 010) 1/1 000 0/0 0/0 1/1 0/0 011 100 1/1 1/1 0/0 001) 1/0 0/0 010) 1/1 000 0/0 0/0 1/1 0/0 011 100 1/1 1/1 0/0 001) 1/0 0/0 010) 1/1 000 0/0 0/0 1/1 0/0 011 100 1/1 1/1 0/0 001) 1/0 0/0 010) 1/1 000 0/0 0/0 1/1 0/0 011 100 1/1 1/1 0/0 001) 1/0 0/0 010) 1/1 000 0/0 0/0 1/1 0/0 011