Suppose we want to use a timer to generate a PWM signal.

-PWM has a duty cycle of 25%.

-PWM has a fixed frequency of 320 Hz.

-The input clock to the timer is 32 MHz.

-The timer uses PWM mode 2: the output is high if the counter is larger than or equal to the content of CCR.

How would you design the prescaler (PSC), the auto-reload register (ARR), and the compare and capture (CCR)? Show your calculation.