Consider the three-stage CMOS op-amp in Figure 13.15. Design an allNMOS transistor current source circuit to establish \(I_{Q 1}=150 \mu \mathrm{A}\). The NMOS transistor parameters are \(k_{n}^{\prime}=100 \mu \mathrm{A} / \mathrm{V}^{2}\) and \(V_{T N}=0.5 \mathrm{~V}\). Assume the minimum width-to-length ratio of any transistor is 2 . Assume \((W / L)_{10}=(W / L)_{11}=20\) as shown in the figure.

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40 V+=5V M3 40 M4 Vol 80 M5 |- M REF 51 M2 V02 25 3- M6 Mg 50 8- 101 102 M10 Mo M1 8- M7 V-=-5 V Figure 13.15 A three-stage CMOS operational amplifier