The CMOS folded cascode circuit in Figure 13.17 is biased at (pm 5 mathrm{~V}) and the reference
Question:
The CMOS folded cascode circuit in Figure 13.17 is biased at \(\pm 5 \mathrm{~V}\) and the reference current is \(I_{\mathrm{REF}}=50 \mu \mathrm{A}\). The transistor parameters are \(V_{T N}=0.5 \mathrm{~V}, V_{T P}=-0.5 \mathrm{~V}, K_{n}=K_{p}=0.5 \mathrm{~mA} / \mathrm{V}^{2}\), and \(\lambda_{n}=\lambda_{p}=\) \(0.015 \mathrm{~V}^{-1}\).
(a) Determine the small-signal differential voltage gain.
(b) Find the output resistance of the circuit.
(c) If the capacitance at the output node is \(C_{L}=5 \mathrm{pF}\), determine the unity-gain bandwidth of the amplifier.
Fantastic news! We've Found the answer you've been seeking!
Step by Step Answer:
Related Book For
Microelectronics Circuit Analysis And Design
ISBN: 9780071289474
4th Edition
Authors: Donald A. Neamen
Question Posted: