In VHDL, why is it necessary to write q < = '1' when state = S0 else
Question:
In VHDL, why is it necessary to write
q < = '1' when state = S0 else '0' ;
rather than simply
q < = (state =S0);
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It is necessary to write rather than ...View the full answer
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Muhammad Umair
I have done job as Embedded System Engineer for just four months but after it i have decided to open my own lab and to work on projects that i can launch my own product in market. I work on different softwares like Proteus, Mikroc to program Embedded Systems. My basic work is on Embedded Systems. I have skills in Autocad, Proteus, C++, C programming and i love to share these skills to other to enhance my knowledge too.
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Related Book For
Digital Design and Computer Architecture
ISBN: 978-0123944245
2nd edition
Authors: David Harris, Sarah Harris
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