Consider the input stage and bias circuit of the 741 op-amp in Figure 13.5. Transistor \(Q_{10}\) may be replaced by a constant-current source equal to \(19 \mu \mathrm{A}\). Assume: the npn devices have parameters \(\beta=200\) and \(V_{A}=150\) \(\mathrm{V}\); the pnp devices have parameters \(\beta=50\) and \(V_{A}=50 \mathrm{~V}\); and all transistors have \(I_{S}=10^{-14} \mathrm{~A}\). Place an appropriate ac load at the collector of \(Q_{6}\).

(a) Using a computer simulation, determine the differential voltage gain of the input stage.

(b) Determine the differential-mode input resistance.

(c) Determine the common-mode input resistance.

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Noninverting input Offset null R = 1 ww Inverting input 26 300 12 Rs= 40 IREF 210 211 R3 = 150 R 1 R = 35 Offset Input stage null Bias circuit V+ V Figure 13.5 Bias circuit and input stage portion of 741 op-amp circuit