The BiFET diff-amp input stage in Figure P13.61 is biased at \(I_{O 1}=1 \mathrm{~mA}\). The JFET parameters are \(V_{P}=4 \mathrm{~V}, I_{D S S}=1 \mathrm{~mA}\), and \(\lambda=0.02 \mathrm{~V}^{-1}\). The bipolar transistor parameters are \(\beta=200\) and \(V_{A}=100\) V.

(a) For \(R_{1}=R_{2}=500 \Omega\), determine the minimum load resistance \(R_{L}\) such that a differential-mode voltage gain of \(A_{d}=500\) is obtained in the input stage.

(b) If \(R_{L}=500 \mathrm{k} \Omega\), determine the range of resistance values \(R_{1}=R_{2}\) such that a differential-mode voltage gain of \(A_{d}=700\) is obtained in this input stage.

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