Question: A CPU with a 24-bit address bus and 16-bit data bus implements the following memory blocks: Design an address decoder to implement this arrangement. 1

A CPU with a 24-bit address bus and 16-bit data bus implements the following memory blocks: 

1 M byte of ROM using 256K X 8-bit chips 8 M bytes of DRAM using 2M X 4-bit chips

Design an address decoder to implement this arrangement.

1 M byte of ROM using 256K X 8-bit chips 8 M bytes of DRAM using 2M X 4-bit chips

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