A RISC processor implements a subroutine call using a link register (i.e., the return address is saved

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A RISC processor implements a subroutine call using a link register (i.e., the return address is saved in the link register).The cost of a call is 2 cycles and the return costs 1 cycle. If a subroutine is called from another subroutine (i.e., the subroutine is nested), the contents of the link register must be saved and later restored. The cost of saving the link register is 6 cycles, and the cost of restoring the link register is 8 cycles. Assume that a certain instruction mix contains 20% subroutine calls and returns (i.e., 10% calls, 10% returns). The probability of a single subroutine call and return without nesting is 60% . The probability that a subroutine call will be followed by a single nested call is 40%. Assume that the probability of further nesting is vanishingly small. What is the overall cost of subroutine calls? The average call of all other instructions is 1.5 cycles. What is the 1l, average number of cycles per instruction?  

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