Consider the following code: The processor has a five-stage pipeline F O E M S; that is,

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Consider the following code:

LDR r1, [16] ADD r1, r1, #1 LDR ADD ADD r2, [r6, #4] r2, r2, #1 r3, rl, r2 ADD r8, r8 , #4 STR r2, [r6, #8]

The processor has a five-stage pipeline F O E M S; that is, instruction fetch, operand fetch, operand execute, memory, and operand write back to register file. 

a. How many cycles does this code take to execute assuming internal forwarding is not used? 

b. How many cycles does this code take to execute assuming internal forwarding is used? 

c. How many cycles does the code take to execute assuming that it is reordered (no internal forwarding)?  

d. How many cycles does the code take to execute assuming reordering and internal forwarding?

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