A certain ROM has a capacity of 16K × 4 and an internal structure like that shown in Figure 12-7.

(a) How many registers are in the array?

(b) How many bits are there per register?

(c) What size decoders does it require?

Figure 12-7

Transcribed Image Text:

CS OE- Ao A₁→ A₂ A₂ ROW SELECT 1-of-4 decoder MSB E 0 1 2 3 COLUMN SELECT 10 1-of-4 decoder 1 2 3 MSB E Row 0 Row 1 Row 2 Row 3 Column 0 Column 1 Column 2 Column 0 Register 0 ⇓ E Register 1 Register 2 E Register 3 ⇓ Column 3 Column 1 Register 4 E U Register U Register 6 E Register 7 Column 2 -CE Register 8 ⇓ E Register 9 ↓ Register 10 E [8] E Register 11 E Output buffers D₂ Ds Dg D₂ D₂ D₂ D₂ D₂ Column 3 Register 12 E ↓ Register 13 E Register 14 E E Register 15 E