In some microcomputers, the MPU can be disabled for short periods of time while another device controls the RAM, ROM, and I/O. During these intervals, a special control signal (D̅M̅A̅) is activated by the MPU and is used to disable (deactivate) the device select logic so that the

are all in their inactive state. Modify the circuit of Figure 4-82 so that

will be deactivated whenever the signal D̅M̅A̅ is active, regardless of the state of the address code.

Figure 4-82

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RAM, ROM, and I/O