The quantization error of an ADC such as the one in Figure 11-13 is always positive because the V_AX value must exceed V_A in order for the comparator output to switch states. This means that the value of V_AX could be as much as 1 LSB greater than V_A. This quantization error can be modified so that VAX would be within ±1/2LSB of V_A. This can be done by adding a fixed voltage equal to ±1/2LSB (±1/2step) to the value of V_A. Figure 11-37 shows this symbolically for a converter that has a resolution of 10 mV/step. A fixed voltage of +5 mV is added to the D/A output in the summing amplifier, and the result, V_AY, is fed to the comparator, which has V_T = 1 mV. For this modified converter, determine the digital output for the following V_A values.

(a) VA = 5.022 V

(b) VA = 50.28 V

Determine the quantization error in each case by comparing V_AX and V_A. Note that the error is positive in one case and negative in the other

Figure 11-37

Figure 11-3

VAY Comp Sum amp VAY = VAX +5 mV EOC VAX +5 mV D/A converter 10 mV/step RESET Ten-bit counter CLOCK CLOCK START