A novel method to cool high-powered microelectronic chips and chip modules is to etch the liquid coolant flow channels in silicon (Si) substrate itself [9–12]. A typical such arrangement with channels of trapezoidal cross section is shown in the figure. The channel and silicon substrate dimensions are as follows: α = 481.4 μm, b = 200  μm, d = 200  μm, and p = 250  μm. The thermophysical properties of silicon are p = 2300 kg/m³, c = 750 J/kg K, and k = 3.6 W/m K. The liquid coolant flowing the trapezoidal channels is at T_∫ = 20°C with a convection heat transfer coefficient h̅_c = 61,250 W/m² K. If the maximum temperature at the chip interface has to be T_cs ≤ 75°C, determine 

(a) The temperature distribution in the silicon substrate due to conduction and the transfer of heat to the coolant in the microchannel
(b) The maximum heat flux dissipation that is accommodated at the chip interface. For the numerical solution and the associated nodal network that needs to be constructed due to symmetry in the geometrical arrangement, consider only the segment indicated by the planes “A–A” in the figure. Also for the heat flux calculation, consider the chip area to be (p + a) × (p + a).

Transcribed Image Text:

Insulating plate Coolant microchannels hc, Iff 11 P Tes Microchip a d A A Si