Question: # 0 4 - 2 0 2 4 - 1 0 0 1 - 7 0 4 CSCl 1 5 0 2 . ( 5
#
CSCl
pt Short questions
A What is the unsigned and signed s complement of pt
unsigned
agned
B Write down the output of a standard UNSIGNED bit subtractor when doing Hint it will cause flowpt
C Write down all the steps of performing SIGNED bit addition of You need to show all steps, including all carry bits pt
D Given input sequence for being what is the state transition sequence and output sequence for the below state diagram
santix
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