1. [1] Suppose a single core running one thread has to wait 100 cycles for its memory system to provide a 64-bit word. If we have several loads coming from different cores to the memory these loads will be serialized and each one will take 100 cycles. Memory designers have come up with a nice idea. What did the designers do, assuming no faster technology exists, to reduce this delay. Ignore the existence of caches for now. 1. [1] Suppose a single core running one thread has to wait 100 cycles for its memory system to provide a 64-bit word. If we have several loads coming from different cores to the memory these loads will be serialized and each one will take 100 cycles. Memory designers have come up with a nice idea. What did the designers do, assuming no faster technology exists, to reduce this delay. Ignore the existence of caches for now