(1) (10 points) Explain what the CPU should do when an interrupt occurs. Include in your answer the method the CPU uses to detect an interrupt, how it is handled, and what happens when the interrupt has been serviced. (2) How many bits would you need to address a 2M* 32 memory if: a) (5 points) The memory is byte addressable? b) (5 points) The memory is word addressable? (3) Suppose we have IG * 16 RAM chips that make up a 32G 64 memory that uses high interleaving. (Note: This means that each word is 64 bits in size and there are 32G of these words. a) (5 points) How many RAM chips are necessary? b) (5 points) Assuming four chips per bank, how many banks are required? c) (5 points) How many lines must go to each chip? d) (5 points) How many bits are needed for a memory address, assuming it is word addressable? e) (5 points) For the bits in part d. draw a diagram indicating how many and which bits are used for chip select, and how many and which bits are used for the address on the chip 1) (5 points) Redo this problem assuming that low-order interleaving is being used instead