$1.(25$ points$)$ Interrupts and Exception Processing

A$.(5$ points$)$ Illustrate how the top of the stack should look like at the moment just before RET is executed.

B$.(5$ points$)$ The MSP$430$F$5529$ receives interrupt requests from the watchdog timer in the interval mode $($WDT$)$ and parallel ports P$1\mathrm{.}7$ and P$2\mathrm{.}2$ during execution of an instruction that takes $6$ clock cycles to execute. P$1$ is received in the $1$st clock cycle of the instruction execution, WDT is received in the $5$th clock cycle, and P$2$ in the $3$rd clock cycle. Which ISR is accepted and processed first, assuming all interrupts are enabled and GIE$=1?$ Hint: Inspect IVT for determining priorities.

C$.(5$ points$)$ How is the priority of interrupts determined?

D$.(5$ points$)$ What arguments do Interrupt service routines return?

E$.(5$ points$)$ At what address does the interrupt vector table start?